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TSMC to build 3D chip packaging facilities in the US and Taiwan

12 June 2021
1 min.
TSMC to build 3D chip packaging facilities in the US and Taiwan

TSMC in the US

Back in 2019, TSMC showed the public a sample of a multi-chip product that combined two 600mm2 processors and eight HBM memory chips on a single substrate. Now the company is ready to move to a three-dimensional layout, and one of the profile companies may appear in the US.

Nikkei Asian Review once again returns to the topic of building new TSMC plants, but now not in Japan, but in the United States, where land has already been purchased for six model plants in the state of Arizona. According to the source, TSMC may strengthen its competencies on US soil through the construction of a chip packaging facility using advanced layout technology. Expanding production in the US in such a scenario could be welcomed by local authorities, as it is not uncommon now for processed silicon wafers to be shipped to other countries to undergo a stage of testing and mounting of individual crystals on a substrate there.

TSMC is drawn into this type of activity because, as the complexity of layout solutions increases, the benefits of vertically integrating process operations grows. Simply put, it makes more sense to concentrate everything in-house. According to Japanese sources, a similar company will be built in western Taiwan and will start serving customers including AMD and Google from 2022. It cannot be ruled out that the 3D cache layout technology demonstrated by AMD's head at Computex 2021 will be used in mass production at the new Taiwanese TSMC plant.



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